876784 Intel, 876784 Datasheet - Page 431

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

LPC Interface Bridge Registers (D31:F0)
10.8.3
Note:
Table 10-11. ACPI and Legacy I/O Register Map (Sheet 1 of 2)
Intel
®
PMBASE
+ Offset
ICH7 Family Datasheet
08h–0Bh
28h–2Bh
3Ah–3Bh
3Ch–41h
00h–01h
02h–03h
04h–07h
0Ch–0Fh
10h–13h
14h–16h
17h–1Fh
2Ch–2Fh
30h–33h
34h–37h
38h–39h
44h–45h
46h–4Fh
14h
15h
16h
20h
20h
42h
43h
Power Management I/O Registers
Table 10-11
support. These registers are enabled in the PCI Device 31: Function 0 space
(PM_IO_EN), and can be moved to any I/O location (128-byte aligned). The registers
are defined to support the ACPI 2.0 specification, and use the same bit names.
All reserved bits and registers will always return 0 when read, and will have no effect
when written.
ALT_GP_SMI_EN
ALT_GP_SMI_ST
DEVACT_STS
Mnemonic
PROC_CNT
GPE0_STS
GPE_CNTL
PM1_CNT
PM1_TMR
PM2_CNT
PM1_STS
GPE0_EN
SMI_STS
PM1_EN
SMI_EN
LV2
LV3
LV4
—
—
—
—
—
—
—
S
shows the registers associated with ACPI and Legacy power management
PM1 Status
PM1 Enable
PM1 Control
PM1 Timer
Reserved
Processor Control
Reserved (Desktop Only)
Level 2 (Mobile/Ultra
Mobile Only)
Level 3 (Mobile/Ultra
Mobile Only)
Level 4 (Mobile/Ultra
Mobile Only)
Reserved
Reserved (Desktop Only)
PM2 Control (Mobile/
Ultra Mobile Only)
General Purpose Event 0
Status
General Purpose Event 0
Enables
SMI# Control and Enable
SMI Status
Alternate GPI SMI Enable
Alternate GPI SMI Status
Reserved
General Purpose Event
Control
Reserved
Device Activity Status
Reserved
Register Name
PM1a_EVT_BLK+2
PM1a_CNT_BLK
PM2a_CNT_BLK
PM1a_EVT_BLK
ACPI Pointer
GPE0_BLK+4
PMTMR_BLK
GPE0_BLK
P_BLK+4
P_BLK+5
P_BLK+6
P_BLK
—
—
—
—
—
—
00000000h
xx000000h
00000000h
00000000h
00000000h
00000000h
00000000h
Default
0000h
0000h
0000h
0000h
0000h
00h
00h
00h
00h
00h
—
—
—
—
—
—
R/W (special)
R/W, RO, WO
R/WC, RO
R/W, WO,
R/W, WO
RO, R/W
R/WC
R/WC
R/WC
R/WC
Type
R/W
R/W
R/W
R/W
RO
RO
RO
RO
—
—
—
—
—
—
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