876784 Intel, 876784 Datasheet - Page 612

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

15.1.25
612
IDE_CONFIG—IDE I/O Configuration Register
(IDE—D31:F1)
Address Offset: 54h
Default Value:
(Desktop
Mobile
Mobile
(Ultra
Only)
Only)
31:24
23:20
19:18
and
and
5:4
5:4
3:2
1:0
Bit
Bit
Primary Drive 1 Cycle Time (PCT1) — R/W. For Ultra ATA mode, the setting of these
bits determines the minimum write strobe cycle time (CT). The DMARDY#-to-STOP
(RP) time is also determined by the setting of these bits.
Reserved
Reserved
Primary Drive 0 Cycle Time (PCT0) — R/W. For Ultra ATA mode, the setting of these
bits determines the minimum write strobe cycle time (CT). The DMARDY#-to-STOP
(RP) time is also determined by the setting of these bits.
Reserved
Miscellaneous Scratchpad (MS) — R/W. Previously defined as a scratchpad bit to
indicate to a driver that ATA-100 is supported. This is not used by software as all
they needed to know was located in bits 7:4. See the definition of those bits.
No Operation (NOP) — R/W. These bits are read/write for legacy software
compatibility, but have no functionality in the Intel
PCB1 = 0 (33 MHz clk)
PCB1 = 0 (33 MHz clk)
00 = CT 4 clocks, RP 6
01 = CT 3 clocks, RP 5
10 = CT 2 clocks, RP 4
00 = CT 4 clocks, RP 6
01 = CT 3 clocks, RP 5
10 = CT 2 clocks, RP 4
11 = Reserved
11 = Reserved
00000000h
clocks
clocks
clocks
clocks
clocks
clocks
PCB1 = 1 (66 MHz clk)
PCB1 = 1 (66 MHz clk)
01 = CT 3 clocks, RP 8
10 = CT 2 clocks, RP 8
01 = CT 3 clocks, RP 8
10 = CT 2 clocks, RP 8
00 = Reserved
11 = Reserved
00 = Reserved
11 = Reserved
Description
Description
Attribute:
Size:
clocks
clocks
clocks
clocks
®
IDE Controller Registers (D31:F1)
ICH7.
Intel
R/W
32 bits
01 = CT 3 clocks, RP 16
01 = CT 3 clocks, RP 16
®
FAST_PCB1 = 1
FAST_PCB1 = 1
ICH7 Family Datasheet
(133 MHz clk)
(133 MHz clk)
00 = Reserved
10 = Reserved
11 = Reserved
00 = Reserved
10 = Reserved
11 = Reserved
clocks
clocks