876784 Intel, 876784 Datasheet - Page 526

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876784

Manufacturer Part Number
876784
Description
Manufacturer
Intel
Datasheet

Specifications of 876784

Lead Free Status / RoHS Status
Compliant
12.3.1.2
526
GHC—Global ICH7 Control Register (D31:F2)
Address Offset: ABAR + 04h–07h
Default Value:
30:2
Bit
31
1
0
AHCI Enable (AE) — R/W. When set, indicates that an AHCI driver is loaded and the
controller will be talked to via AHCI mechanisms. This can be used by an Intel
that supports both legacy mechanisms (such as SFF-8038i) and AHCI to know when the
controller will not be talked to as legacy.
When set, software will only talk to the ICH7 using AHCI. The ICH7 will not have to
allow command processing via both AHCI and legacy mechanisms. When cleared,
software will only talk to the ICH7 using legacy mechanisms.
Software shall set this bit to 1 before accessing other AHCI registers.
Reserved. Returns 0.
Interrupt Enable (IE) — R/W. This global bit enables interrupts from the ICH7.
0 = All interrupt sources from all ports are disabled.
1 = Interrupts are allowed from the AHCI controller.
HBA Reset (HR) — R/W. Resets ICH7 AHCI controller.
0 = No effect
1 = Causes an internal reset of the ICH7 AHCI controller. All state machines that relate
NOTE: For further details, consult section 12.3.3 of the Serial ATA Advanced Host
to data transfers and queuing return to an idle condition, and all ports are re-
initialized via COMRESET.
Controller Interface specification.
00000000h
SATA Controller Registers (D31:F2) (Desktop and Mobile Only)
Description
Attribute:
Size:
Intel
R/W
32 bits
®
ICH7 Family Datasheet
®
ICH7

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