876784 Intel, 876784 Datasheet - Page 72

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

2.20
Table 2-20. Serial Peripheral Interface (SPI) Signals
2.21
2.22
Table 2-21. General Purpose I/O Signals (Sheet 1 of 3)
72
(Desktop and
(Desktop and
Serial Peripheral Interface (SPI) (Desktop and
Mobile Only)
Intel
Only)
General Purpose I/O Signals
GPIO[47:40]
GPIO[39:38]
Mobile Only)
Mobile Only)
EL_STATE[1:0] /
Name
Signal Name
GPIO49
GPIO48
GPIO37
GPIO[28:27]
SPI_MISO
SPI_MOSI
SPI_CS#
EL_RSVD /
SPI_ARB
SPI_CLK
Name
GPIO26
1,2
®
Quick Resume Technology (Intel
Type
N/A
I/O
I/O
I/O
I/O
Type
I/O
Type
O
O
I
I
I/O
I/O
Tolerance
V_CPU_IO
SPI Chip Select: This chip select signal is also used as the SPI bus
request signal.
SPI Master IN Slave OUT: This signal is the data input pin for
Intel
SPI Master OUT Slave IN: This signal is the data output pin for
ICH7.
SPI Arbitration: SPI_ARB is the SPI arbitration signal used to
arbitrate the SPI bus with Intel PRO 82573E Gigabit Ethernet
Controller when Shared Flash is implemented.
SPI Clock: This signal is the SPI clock signal. During idle, the bus
owner will drive the clock signal low. 17.86 MHz.
3.3 V
3.3 V
3.3 V
N/A
Intel
reserved and should be left as a no connect when Intel Quick
Resume Technology is enabled.
NOTE: This signal cannot be reused as a GPIO when Intel Quick
Intel Quick Resume Technology State: Intel Quick Resume
Technology status signals that may optionally be used to drive front
chassis indicators. See
®
®
ICH7.
Resume Technology is enabled.
Quick Resume Technology Reserved: This signal is
V_CPU_IO
Power
Well
Core
Core
Core
N/A
Section 5.26.3
Default
Native
Native
N/A
GPI
GPI
Description
Description
Multiplexed with CPUPWRGD
Multiplexed with GNT4#
Not implemented.
Unmultiplexed.
Multiplexed with SATA3GP.
for details.
Intel
®
Description
ICH7 Family Datasheet
®
Signal Description
ICH7DH