876784 Intel, 876784 Datasheet - Page 516

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

12.1.40
.
12.1.41
.
12.1.42
.
516
ATC—APM Trapping Control Register (SATA–D31:F2)
Address Offset: C0h
Default Value:
ATS—APM Trapping Status Register (SATA–D31:F2)
Address Offset: C4h
Default Value:
SP — Scratch Pad Register (SATA–D31:F2)
Address Offset: D0h
Default Value:
31:0
7:4
7:4
Bit
Bit
Bit
3
2
1
0
3
2
1
0
Reserved
Secondary Slave Trap (SST) — R/W. Enables trapping and SMI# assertion on legacy
I/O accesses to 170h–177h and 376h. The active device on the secondary interface
must be device 1 for the trap and/or SMI# to occur.
Secondary Master Trap (SMT) — R/W. Enables trapping and SMI# assertion on
legacy I/O accesses to 170h–177h and 376h. The active device on the secondary
interface must be device 0 for the trap and/or SMI# to occur.
Primary Slave Trap (PST) — R/W. Enables trapping and SMI# assertion on legacy I/
O accesses to 1F0h–1F7h and 3F6h. The active device on the primary interface must be
device 1 for the trap and/or SMI# to occur.
Primary Master Trap (PMT) — R/W. Enables trapping and SMI# assertion on legacy
I/O accesses to 1F0h–1F7h and 3F6h. The active device on the primary interface must
be device 0 for the trap and/or SMI# to occur.
Reserved
Secondary Slave Trap (SST) — R/WC. Indicates that a trap occurred to the
secondary slave device.
Secondary Master Trap (SPT) — R/WC. Indicates that a trap occurred to the
secondary master device.
Primary Slave Trap (PST) — R/WC. Indicates that a trap occurred to the primary
slave device.
Primary Master Trap (PMT) — R/WC. Indicates that a trap occurred to the primary
master device.
Data (DT) — R/W. This is a read/write register that is available for software to use. No
hardware action is taken on this register.
00h
00h
00000000h
SATA Controller Registers (D31:F2) (Desktop and Mobile Only)
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Intel
R/W
8 bits
R/WC
8 bits
R/W
32 bits
®
ICH7 Family Datasheet