EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 788

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

3–34
Figure 3–18. The ×N_Top and ×N_Bottom Clock Line Connections
Stratix IV Device Handbook Volume 2: Transceivers
Figure 3–18
Transceiver Block GXBR1
Transceiver Block GXBR2
Transceiver Block GXBR0
ATX R1 PLL Block
CMU0 Channel
ATX R0 PLL Block
CMU1 Channel
CMU0 Channel
CMU1 Channel
CMU1 Channel
CMU0 Channel
Channel 1
Channel 0
Channel 3
Channel 2
Channel 1
Channel 0
Channel 3
Channel 2
Channel 1
Channel 0
Channel 3
Channel 2
shows the different drivers of the ×N_Top and ×N_Bottom clock lines.
CMU1 GXBR0
CMU1 GXBR2
CMU1 GXBR1
x1
x1
x1
CMU0 GXBR2
CMU0 GXBR1
CMU0 GXBR0
Chapter 3: Configuring Multiple Protocols and Data Rates in Stratix IV Devices
x1
x1
x1
x4_GXBR2
Combining Transceiver Channels in Basic (PMA Direct) Configurations
x4_GXBR0
x4_GXBR1
xN_Bottom
xN_Top
February 2011 Altera Corporation