EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 864
![IC STRATIX IV FPGA 530K 1152HBGA](/photos/37/12/371227/1152pin_fbga_sml.jpg)
EP4SGX530HH35C2N
Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
7.EP4SGX530HH35C2N.pdf
(1145 pages)
Specifications of EP4SGX530HH35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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5–18
Figure 5–9. Method 3—Write Transaction Waveform
Note to
(1) For this example, the number of channels controlled by the dynamic reconfiguration controller (ALTGX_RECONFIG instance) is two and the
Stratix IV Device Handbook Volume 2: Transceivers
tx_vodctrl control port is enabled.
Figure
5–9:
rx_tx_duplex_sel [1:0]
1
tx_vodctrl [5:0]
reconfig_clk
In this method, the PMA controls are written into all the channels connected to the
dynamic reconfiguration controller. Therefore, to write to a specific channel:
1. Retain the stored values of the other active channels using a read transaction.
2. Set the new value at the bits corresponding to the specific channel.
3. Perform a write transaction.
For example, assume that the number of channels controlled by the
ALTGX_RECONFIG instance is two, tx_vodctrl in this case is 6 bits wide
(tx_vodctrl[2:0] corresponds to channel 1 and tx_vodctrl[5:3] corresponds to
channel 2). Follow these steps:
1. If you want to dynamically reconfigure the PMA controls of only channel 2 with a
2. Perform a write transaction. This ensures that the new values are written only to
Figure 5–9
Simultaneous write and read transactions are not allowed.
write_all
new value, first perform a read transaction to retrieve the existing PMA control
values from tx_vodctrl_out[5:0]. Take tx_vodctrl_out[2:0] and provide this
value in tx_vodctrl[2:0] to the write in channel 1. By doing so, channel 1 is
overwritten with the same value.
channel 2, while channel 1 remains unchanged.
busy
Write Transaction
(1)
shows a write transaction waveform using Method 3.
2’b00
6’b000000
6’b000011
2’b10 (transmitter portion only)
Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Dynamic Reconfiguration Modes Implementation
February 2011 Altera Corporation
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