EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 88

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

4–8
Stratix IV Operational Modes Overview
Table 4–2. Stratix IV DSP Block Operation Modes
Stratix IV Device Handbook Volume 1
Independent
Multiplier
Two-Multiplier
Adder
Four-Multiplier
Adder
Multiply
Accumulate
Shift
High Precision
Multiplier Adder
Notes to
(1) This mode also supports loopback mode. In loopback mode, the number of loopback multipliers per DSP block is two. You can use the
(2) Dynamic shift mode supports arithmetic shift left, arithmetic shift right, logical shift left, logical shift right, and rotation operation.
(3) Dynamic shift mode operates on a 32-bit input vector but the multiplier width is configured as 36 bits.
(4) Unsigned value is also supported but you must ensure that the result can be contained within 36 bits.
remaining multipliers in regular two-multiplier adder mode.
Mode
(2)
(1)
Table
4–2:
36 bits
Multiplier
in Width
Double
12 bits
18 bits
36 bits
18 bits
18 bits
18 bits
18× 36
9 bits
You can use each Stratix IV DSP block in one of five basic operational modes.
Table 4–2
can implement within a single DSP block, depending on the mode.
The DSP block consists of two identical halves (the top half and bottom half). Each
half has four 18 × 18 multipliers.
The Quartus
operation of the multipliers. After making the appropriate parameter settings using
the megafunction’s MegaWizard
automatically configures the DSP block.
Stratix IV DSP blocks can operate in different modes simultaneously. Each half block
is fully independent except for the sharing of the three clock, ena, and aclr signals.
For example, you can break down a single DSP block to operate a 9 × 9 multiplier in
one half block and an 18 × 18 two-multiplier adder in the other half block. This
increases DSP block resource efficiency and allows you to implement more
multipliers within a Stratix IV device. The Quartus II software automatically places
multipliers that can share the same DSP block resources within the same block.
(3)
Mults
lists the five basic operational modes and the number of multipliers that you
# of
1
1
1
1
1
2
4
4
1
2
®
II software includes megafunctions used to control the mode of
Block
# per
8
6
4
2
2
4
2
2
2
2
Signed
Signed or
Unsigned
Both
Both
Both
Both
Both
Both
Both
Both
Both
(4)
™
Plug-In Manager, the Quartus II software
RND,
SAT
Yes
Yes
Yes
Yes
No
No
No
No
No
No
Register
In Shift
Yes
Yes
Yes
No
No
No
No
No
No
No
Chapter 4: DSP Blocks in Stratix IV Devices
Chainout
Adder
Stratix IV Operational Modes Overview
Yes
Yes
No
No
No
No
No
No
No
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February 2011 Altera Corporation
1st Stage
Add/Sub
Both
Both
Both
—
—
—
—
—
—
—
Add Only
Add Only
Add/Acc
Stage
Both
2nd
—
—
—
—
—
—
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