EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 979

IC STRATIX IV FPGA 530K 1152HBGA

EP4SGX530HH35C2N

Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP4SGX530HH35C2N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP4SGX530HH35C2N
Manufacturer:
ALTERA
0
Part Number:
EP4SGX530HH35C2NAD
Manufacturer:
ALTERA
0
Part Number:
EP4SGX530HH35C2NAE
Manufacturer:
ALTERA
0
Chapter 1: ALTGX Transceiver Setup Guide for Stratix IV Devices
Parameter Settings
Table 1–4. MegaWizard Plug-In Manager Options (Lpbk Screen)
February 2011 Altera Corporation
Which loopback option
would you like?
Which reverse loopback
option would you like?
ALTGX Setting
Table 1–4
Plug-In Manager for your ALTGX custom megafunction variation.
There are two options available:
This signal is asynchronous to the receiver datapath.
There are three options available:
No loopback—This is the default mode.
Serial loopback—If you select serial loopback, the
rx_seriallpbken port is available to control the serial
loopback feature dynamically.
No reverse loopback—This is the default mode.
Reverse Serial loopback (pre-CDR)—This is the
loopback before the receiver’s CDR block to the
transmitter buffer. The receiver path in PCS is active but
the transmitter side is not.
Reverse Serial loopback—This is a loopback after the
receiver’s CDR block to the transmitter buffer. The receiver
path in PCS is active but the transmitter side is not.
lists the available options on the Loopback screen of the MegaWizard
1'b1—enables serial loopback
1'b0—disables serial loopback
Description
Stratix IV Device Handbook Volume 3
“Serial Loopback” section in
the
in Stratix IV Devices
chapter.
“Loopback Modes” section
in the
Architecture in Stratix IV
Devices
Transceiver Architecture
Transceiver
chapter.
Reference
1–21

Related parts for EP4SGX530HH35C2N