MC9S12E128CPV Freescale Semiconductor, MC9S12E128CPV Datasheet - Page 143

• Manufacturer Part Number: MC9S12E128CPV
• Description: Microcontrollers (MCU) 16 Bit 16MHz
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12E128CPV

• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-112
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• Lead Free Status / Rohs Status: No RoHS Version Available

3.3.3.3
Read: Anytime. Write: Anytime.
This register configures port pins PP[5:0] as either input or output.
If a PMF channel is enabled, the corresponding pin is forced to be an output and the associated Data
Direction Register bit has no effect. If a PMF channel is disabled, the corresponding Data Direction
Register bit reverts to control the I/O direction of the associated pin.
3.3.3.4
Read:Anytime. Write:Anytime.
This register configures the drive strength of configured output pins as either full or reduced. If a pin is
configured as input, the corresponding Reduced Drive Register bit has no effect.
Freescale Semiconductor
DDRP[5:0]
RDRP[5:0]
Reset
Reset
Field
Field
5:0
5:0
W
W
R
R
Data Direction Port P
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Reduced Drive Port P
0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
Port P Data Direction Register (DDRP)
Port P Reduced Drive Register (RDRP)
0
0
0
0
7
7
= Reserved or Unimplemented
= Reserved or Unimplemented
0
0
0
0
6
6
Figure 3-20. Port P Reduced Drive Register (RDRP)
Figure 3-19. Port P Data Direction Register (DDRP)
Table 3-14. DDRP Field Descriptions
Table 3-15. RDRP Field Descriptions
DDRP5
RDRP5
MC9S12E128 Data Sheet, Rev. 1.07
0
0
5
5
DDRP4
RDRP4
0
0
4
4
Description
Description
DDRP3
RDRP3
0
0
3
3
Chapter 3 Port Integration Module (PIM9E128V1)
DDRP2
RDRP2
0
0
2
2
DDRP1
RDRP1
0
0
1
1
DDRP0
RDRP0
0
0
0
0
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