MC9S12E128CPV Freescale Semiconductor, MC9S12E128CPV Datasheet - Page 69

Microcontrollers (MCU) 16 Bit 16MHz

MC9S12E128CPV

Manufacturer Part Number
MC9S12E128CPV
Description
Microcontrollers (MCU) 16 Bit 16MHz
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12E128CPV

Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
16 bit
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
LQFP-112
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
8 bit, 2 Channel
Lead Free Status / Rohs Status
No RoHS Version Available

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PIM_9E128 block description chapter and the DAC_8B1C block description chapter for information about
pin configurations.
1.4.26
PM0 is a general purpose input or output pin. When the Digital to Analog module 2 (DAC2) is enabled the
PM0 pin is configured as the analog output DA02 of DAC2. While in reset and immediately out of reset
the PM0 pin is configured as a high impedance input pin. Consult the Port Integration Module (PIM)
PIM_9E128 block description chapter and the DAC_8B1C block description chapter for information about
pin configurations.
1.4.27
PP[5:0] are general purpose input or output pins. When the Pulse width Modulator with Fault protection
(PMF) is enabled the PP[5:0] output pins, as a whole or as pairs, can be configured as PW0[5:0] outputs.
While in reset and immediately out of reset the PP[5:0] pins are configured as a high impedance input pins.
Consult the Port Integration Module (PIM) PIM_9E128 block description chapter and the PMF_15B6C
block description chapter for information about pin configurations.
1.4.28
PQ[6:4] are general purpose input or output pins. When enabled in the Pulse width Modulator with Fault
protection module (PMF), the PQ[6:4] pins become the current status input pins, IS[2:0], for top/bottom
pulse width correction. While in reset and immediately out of reset PP[5:0] pins are configured as a high
impedance input pins. Consult the Port Integration Module (PIM) PIM_9E128 block description chapter
and the PMF_15B6C block description chapter for information about pin configurations.
1.4.29
PQ[3:0] are general purpose input or output pins. When enabled in the Pulse width Modulator with Fault
protection module (PMF), the PQ[3:0] pins become the Fault protection inputs pins, FAULT[3:0], of the
PMF. While in reset and immediately out of reset the PQ[3:0] pins are configured as a high impedance
input pins. Consult the Port Integration Module (PIM) PIM_9E128 block description chapter and the
PMF_15B6C block description chapter for information about pin configurations.
1.4.30
PS7 is a general purpose input or output. When the Serial Peripheral Interface (SPI) is enabled PS7
becomes the slave select pin SS. While in reset and immediately out of reset the PS7 pin is configured as
a high impedance input pin. Consult the Port Integration Module (PIM) PIM_9E128 block description
chapter and the SPI block description chapter for information about pin configurations.
Freescale Semiconductor
PM0 / DAO2 — Port M I/O Pin 0
PP[5:0] / PW0[5:0] — Port P I/O Pins [5:0]
PQ[6:4] / IS[2:0] — Port Q I/O Pins [6:4]
PQ[3:0] / FAULT[3:0] — Port Q I/O Pins [3:0]
PS7 / SS — Port S I/O Pin 7
MC9S12E128 Data Sheet, Rev. 1.07
Chapter 1 MC9S12E128 Device Overview (MC9S12E128DGV1)
69

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