MC9S12E128CPV Freescale Semiconductor, MC9S12E128CPV Datasheet - Page 21

Microcontrollers (MCU) 16 Bit 16MHz

MC9S12E128CPV

Manufacturer Part Number
MC9S12E128CPV
Description
Microcontrollers (MCU) 16 Bit 16MHz
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12E128CPV

Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
16 bit
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
LQFP-112
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
8 bit, 2 Channel
Lead Free Status / Rohs Status
No RoHS Version Available

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Chapter 1
MC9S12E128 Device Overview (MC9S12E128DGV1)
1.1
The MC9S12E128 is a 112/80/64 pin low cost general purpose MCU comprised of standard on-chip
peripherals including a 16-bit central processing unit (HCS12 CPU), up to 128K bytes of Flash EEPROM,
up to 8K bytes of RAM, three asynchronous serial communications interface modules (SCI), a serial
peripheral interface (SPI), an Inter-IC Bus (IIC), three 4-channel 16-bit timer modules (TIM), a 6-channel
15-bit Pulse Modulator with Fault protection module (PMF), a 6-channel 8-bit Pulse Width Modulator
(PWM), a 16-channel 10-bit analog-to-digital converter (ADC), and two 1-channel 8-bit digital-to-analog
converters (DAC). The MC9S12E128 has full 16-bit data paths throughout. The inclusion of a PLL circuit
allows power consumption and performance to be adjusted to suit operational requirements. In addition to
the I/O ports available on each module, 16 dedicated I/O port bits are available with Wake-Up capability
from STOP or WAIT mode. Furthermore, an on chip bandgap based voltage regulator (VREG) generates
the internal digital supply voltage of 2.5V (VDD) from a 3.135V to 5.5V external supply range.
1.1.1
Freescale Semiconductor
16-bit HCS12 CORE
— HCS12 CPU
— Module Mapping Control (MMC)
— Interrupt control (INT)
— Background Debug Module (BDM)
— Debugger (DBG12) including breakpoints and change-of-flow trace buffer
— Multiplexed External Bus Interface (MEBI)
Wake-Up interrupt inputs
— Up to 16 port bits available for wake up interrupt function with digital filtering
Memory Options
— 32K, 64K or 128K Byte Flash EEPROM
— 2K, 4K or 8K Byte RAM
Introduction
– i. Upward compatible with M68HC11 instruction set
– ii. Interrupt stacking and programmer’s model identical to M68HC11
– iii. Instruction queue
– iv. Enhanced indexed addressing
Features
MC9S12E128 Data Sheet, Rev. 1.07
21

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