MC9S12E128CPV Freescale Semiconductor, MC9S12E128CPV Datasheet - Page 378

• Manufacturer Part Number: MC9S12E128CPV
• Description: Microcontrollers (MCU) 16 Bit 16MHz
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12E128CPV

• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-112
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• Lead Free Status / Rohs Status: No RoHS Version Available

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
11.4.8.2
Setting a fault mode bit, FMODEx, configures faults from the FAULTx pin for automatic clearing.
When FMODEx is set, disabled PWM pins are enabled when the FAULTx pin returns to logic zero and a
new PWM half cycle begins. See
pins when FMODEx is set.
11.4.8.3
Clearing a fault mode bit, FMODEx, configures faults from the FAULTx pin for manual clearing:
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PWM pins disabled by the FAULT0 pin or the FAULT2 pin are enabled by clearing the
corresponding FFLAGx flag. The time at which the PWM pins are enabled depends on the
corresponding QSMPx bit setting. If QSMPx = 00, the PWM pins are enabled on the next IP bus
cycle when the logic level detected by the filter at the fault pin is logic zero. If QSMPx = 01,10 or
11, the PWMs are enabled when the next PWM half cycle begins regardless of the state of the logic
level detected by the filter at the fault. See
PWM pins disabled by the FAULT1 pin or the FAULT3 pin are enabled when
— Software clears the corresponding FFLAGx flag
— The filter detects a logic zero on the fault pin at the start of the next PWM half cycle boundary.
See
Automatic Fault Clearing
Manual Fault Clearing
Figure
FAULT0 OR
FAULT PIN
FAULT2
Figure 11-77. Manual Fault Clearing (Faults 0 & 2) — QSMP = 00
11-79.
PWMS ENABLED
PWMS ENABLED
Figure
Figure 11-76. Automatic Fault Clearing
MC9S12E128 Data Sheet, Rev. 1.07
11-76. Clearing the FFLAGx flag does not affect disabled PWM
PWMS DISABLED
CLEARED
PWMS DISABLED
FFLAGx
Figure 11-77
ENABLED
DISABLED
and
PWMS ENABLED
Figure
PWMS ENABLED
11-78.
Freescale Semiconductor