MC9S12E128CPV Freescale Semiconductor, MC9S12E128CPV Datasheet - Page 70

• Manufacturer Part Number: MC9S12E128CPV
• Description: Microcontrollers (MCU) 16 Bit 16MHz
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12E128CPV

• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-112
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• Lead Free Status / Rohs Status: No RoHS Version Available

Chapter 1 MC9S12E128 Device Overview (MC9S12E128DGV1)
1.4.31
PS6 is a general purpose input or output pin. When the Serial Peripheral Interface (SPI) is enabled PS6
becomes the serial clock pin, SCK. While in reset and immediately out of reset the PS6 pin is configured
as a high impedance input pin. Consult the Port Integration Module (PIM) PIM_9E128 block description
chapter and the SPI block description chapter for information about pin configurations.
1.4.32
PS5 is a general purpose input or output pin. When the Serial Peripheral Interface (SPI) is enabled PS5 is
the master output (during master mode) or slave input (during slave mode) pin. While in reset and
immediately out of reset the PS5 pin is configured as a high impedance input pin Consult the Port
Integration Module (PIM) PIM_9E128 block description chapter and the SPI block description chapter for
information about pin configurations.
1.4.33
PS4 is a general purpose input or output pin. When the Serial Peripheral Interface (SPI) is enabled PS4 is
the master input (during master mode) or slave output (during slave mode) pin. While in reset and
immediately out of reset the PS4 pin is configured as a high impedance input pin. Consult the Port
Integration Module (PIM) PIM_9E128 block description chapter and the SPI block description chapter for
information about pin configurations.
1.4.34
PS3 is a general purpose input or output. When the Serial Communications Interface 1 (SCI1) transmitter
is enabled the PS3 pin is configured as the transmit pin, TXD1, of SCI1. While in reset and immediately
out of reset the PS3 pin is configured as a high impedance input pin. Consult the Port Integration Module
(PIM) PIM_9E128 block description chapter and the SCI block description chapter for information about
pin configurations.
1.4.35
PS2 is a general purpose input or output. When the Serial Communications Interface 1 (SCI1) receiver is
enabled the PS2 pin is configured as the receive pin RXD1 of SCI1. While in reset and immediately out of
reset the PS2 pin is configured as a high impedance input pin. Consult the Port Integration Module (PIM)
PIM_9E128 block description chapter and the SCI block description chapter for information about pin
configurations.
1.4.36
PS1 is a general purpose input or output. When the Serial Communications Interface 0 (SCI0) transmitter
is enabled the PS1 pin is configured as the transmit pin, TXD0, of SCI0. While in reset and immediately
out of reset the PS1 pin is configured as a high impedance input pin. Consult the Port Integration Module
(PIM) PIM_9E128 block description chapter and the SCI block description chapter for information about
pin configurations.
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PS6 / SCK — Port S I/O Pin 6
PS5 / MOSI — Port S I/O Pin 5
PS4 / MISO — Port S I/O Pin 4
PS3 / TXD1 — Port S I/O Pin 3
PS2 / RXD1 — Port S I/O Pin 2
PS1 / TXD0 — Port S I/O Pin 1
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor