MC9S12E128CPV Freescale Semiconductor, MC9S12E128CPV Datasheet - Page 224

• Manufacturer Part Number: MC9S12E128CPV
• Description: Microcontrollers (MCU) 16 Bit 16MHz
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12E128CPV

• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-112
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• Lead Free Status / Rohs Status: No RoHS Version Available

Chapter 6 Analog-to-Digital Converter (ATD10B16CV2)
6.3.2.10
This read-only register contains the Conversion Complete Flags CCF15 to CCF8.
Read: Anytime
Write: Anytime, no effect
224
CCF[15:8]
Reset
Field
7:0
W
R
SC
CCF15
1
1
1
1
1
1
ATD Status Register 2 (ATDSTAT2)
0
7
Conversion Complete Flag Bits — A conversion complete flag is set at the end of each conversion in a
conversion sequence. The flags are associated with the conversion position in a sequence (and also the result
register number). Therefore, CCF8 is set when the ninth conversion in a sequence is complete and the result
is available in result register ATDDR8; CCF9 is set when the tenth conversion in a sequence is complete and
the result is available in ATDDR9, and so forth. A flag CCFx (x = 15, 14, 13, 12, 11, 10, 9, 8) is cleared when
one of the following occurs:
In case of a concurrent set and clear on CCFx: The clearing by method A) will overwrite the set. The clearing
by methods B) or C) will be overwritten by the set.
0 Conversion number x not completed
1 Conversion number x has completed, result ready in ATDDRx
• Write to ATDCTL5 (a new conversion sequence is started)
• If AFFC = 0 and read of ATDSTAT2 followed by read of result register ATDDRx
• If AFFC = 1 and read of result register ATDDRx
= Unimplemented or Reserved
CD
CCF14
0
0
0
0
0
1
0
6
Figure 6-12. ATD Status Register 2 (ATDSTAT2)
Table 6-16. Special Channel Select Coding
Table 6-17. ATDSTAT2 Field Descriptions
CCF13
CC
MC9S12E128 Data Sheet, Rev. 1.07
X
0
1
1
1
1
0
5
CCF12
CB
0
4
X
X
0
0
1
1
Description
CCF11
0
3
CA
X
X
0
1
0
1
CCF10
0
2
Analog Input Channel
(V
Reserved
Reserved
Reserved
RH
Freescale Semiconductor
V
+V
V
CCF9
RH
RL
0
RL
1
) / 2
CCF8
0
0