MC9S12E128CPV Freescale Semiconductor, MC9S12E128CPV Datasheet - Page 425

• Manufacturer Part Number: MC9S12E128CPV
• Description: Microcontrollers (MCU) 16 Bit 16MHz
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12E128CPV

• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-112
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 8 bit, 2 Channel
• Lead Free Status / Rohs Status: No RoHS Version Available

13.3.2.7
Read: Anytime
Write: Anytime
13.3.2.8
Read: Anytime
Write: Anytime
Freescale Semiconductor
TOV[7:4]
TSFRZ
TFFCA
Reset
Reset
Field
Field
7:4
5
4
W
W
R
R
TOV7
OM7
Timer Stops While in Freeze Mode
0 Allows the timer counter to continue running while in freeze mode.
1 Disables the timer counter whenever the MCU is in freeze mode. This is useful for emulation.
TSFRZ does not stop the pulse accumulator.
Timer Fast Flag Clear All
0 Allows the timer flag clearing to function normally.
1 For TFLG1(0x000E), a read from an input capture or a write to the output compare channel (0x0010–0x001F)
Toggle On Overflow Bits — TOVx toggles output compare pin on overflow. This feature only takes effect when
in output compare mode. When set, it takes precedence over forced output compare but not channel 7 override
events.
0 Toggle output compare pin on overflow feature disabled.
1 Toggle output compare pin on overflow feature enabled.
Timer Toggle On Overflow Register 1 (TTOV)
Timer Control Register 1 (TCTL1)
0
0
7
7
causes the corresponding channel flag, CnF, to be cleared. For TFLG2 (0x000F), any access to the TCNT
register (0x0004, 0x0005) clears the TOF flag. Any access to the PACNT registers (0x0022, 0x0023) clears
the PAOVF and PAIF flags in the PAFLG register (0x0021). This has the advantage of eliminating software
overhead in a separate clear sequence. Extra care is required to avoid accidental flag clearing due to
unintended accesses.
Figure 13-13. Timer Toggle On Overflow Register 1 (TTOV)
TOV6
OL7
0
0
6
6
Table 13-6. TSCR1 Field Descriptions (continued)
Figure 13-14. Timer Control Register 1 (TCTL1)
Table 13-7. TTOV Field Descriptions
TOV5
OM6
MC9S12E128 Data Sheet, Rev. 1.07
0
0
5
5
TOV4
OL6
0
0
4
4
Description
Description
OM5
0
0
0
3
3
OL5
Chapter 13 Timer Module (TIM16B4CV1)
0
0
0
2
2
OM4
0
0
0
1
1
OL4
0
0
0
0
0
425