R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 1017
R0K572011S000BE
Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets
1.R0K572011S000BE.pdf
(1222 pages)
2.R0K572011S000BE.pdf
(7 pages)
3.R0K572011S000BE.pdf
(5 pages)
Specifications of R0K572011S000BE
Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 1017 of 1222
- Download datasheet (8Mb)
SH7201 Group
This LSI has an on-chip RAM module that achieves high-speed access and can store instructions
or data.
On-chip RAM operation and write access to the RAM can be enabled or disabled through the
RAM enable bits and RAM write enable bits.
24.1
• Pages
• Memory map
Table 24.1 On-Chip RAM Address Spaces
• Ports
• Priority
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Page
Page 0
Page 1
Two pages (pages 0 and 1) are provided.
The on-chip RAM is located in the address spaces shown in table 24.1.
Each page has two independent read and write ports and is connected to the internal bus (I
bus), CPU instruction fetch bus (F bus), and CPU memory access bus (M bus). (Note that the F
bus is connected only to the read ports.)
The F bus and M bus are used for access by the CPU, and the I bus is used for access by the
DMAC via the internal DMA write bus/internal DMA read bus and bus bridge.
When requests for access to the same page from different buses coincide, the access is
processed in priority order. The priority is I bus > M bus > F bus.
Features
Section 24 On-Chip RAM
Address
H'FFF80000 to H'FFF83FFF
H'FFF84000 to H'FFF87FFF
Section 24 On-Chip RAM
Page 989 of 1190
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