R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 862

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 19 Controller Area Network (RCAN-ET)
19.4.3
The bit configuration registers (BCR0 and BCR1) are 2 × 16-bit read/write register that are used to
set CAN bit timing parameters and the baud rate pre-scaler for the CAN Interface.
The Time quanta is defined as:
Where: BRP (Baud Rate Pre-scaler) is the value stored in BCR0 incremented by 1 and fclk is the
used peripheral clock frequency.
• BCR1 (Address = H'004)
Please refer to the table below for TSG1 and TSG2 setting.
Bits 15 to 12 — Time Segment 1 (TSG1[3:0] = BCR1[15:12]): These bits are used to set the
segment TSEG1 ( = PRSEG + PHSEG1) to compensate for edges on the CAN Bus with a positive
phase error. A value from 4 to 16 time quanta can be set.
Page 834 of 1190
Bit 15:
TSG1[3]
0
0
0
0
0
:
:
1
Initial value:
R/W:
Bit:
Timequanta =
Bit Configuration Register (BCR0, BCR1)
Bit 14:
TSG1[2]
0
0
0
0
1
:
:
1
R/W
15
0
R/W
TSG1[3:0]
14
0
Bit 13:
TSG1[1]
0
0
1
1
0
:
:
1
R/W
13
0
2
f
clk
BRP
R/W
12
0
Bit 12:
TSG1[0] Description
0
1
0
1
0
:
:
1
11
—
R
0
R/W
Setting prohibited (Initial value)
Setting prohibited
Setting prohibited
PRSEG + PHSEG1 = 4 time quanta
PRSEG + PHSEG1 = 5 time quanta
:
:
PRSEG + PHSEG1 = 16 time quanta
10
0
TSG2[2:0]
R/W
9
0
R/W
8
0
—
R
7
0
—
R
6
0
R/W
SJW[1:0]
5
0
R/W
4
0
R01UH0026EJ0300 Rev. 3.00
—
R
3
0
—
R
2
0
SH7201 Group
Sep 24, 2010
—
R
1
0
BSP
R/W
0
0