R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 730

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 16 Serial Communication Interface with FIFO (SCIF)
16.3.10 FIFO Data Count Register (SCFDR)
SCFDR is a 16-bit register which indicates the quantity of data stored in the transmit FIFO data
register (SCFTDR) and the receive FIFO data register (SCFRDR).
It indicates the quantity of transmit data in SCFTDR with the upper 8 bits, and the quantity of
receive data in SCFRDR with the lower 8 bits. SCFDR can always be read by the CPU. SCFDR is
initialized to H'0000 by a power on reset or in deep standby mode.
Page 702 of 1190
Bit
15 to 13
12 to 8
7 to 5
4 to 0
Initial value:
R/W:
Bit:
Bit Name
—
T[4:0]
—
R[4:0]
15
—
R
0
14
—
R
0
13
—
R
0
Initial
Value
All 0
00000
All 0
00000
12
R
0
11
R
0
R/W
R
R
R
R
T[4:0]
10
R
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
T4 to T0 bits indicate the quantity of non-transmitted
data stored in SCFTDR. H'00 means no transmit data,
and H'10 means that SCFTDR is full of transmit data.
Reserved
These bits are always read as 0. The write value should
always be 0.
R4 to R0 bits indicate the quantity of receive data
stored in SCFRDR. H'00 means no receive data, and
H'10 means that SCFRDR full of receive data.
R
0
9
R
0
8
—
R
0
7
—
R
0
6
—
R
0
5
R
0
4
R01UH0026EJ0300 Rev. 3.00
R
0
3
R[4:0]
R
0
2
SH7201 Group
R
0
Sep 24, 2010
1
R
0
0