R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 809

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
SH7201 Group
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
9
8
7
Bit Name
PDTA
DEL
Initial
Value
0
0
0
R/W
R/W
R/W
R
Description
Serial Data Delay
0: 1 clock cycle delay between SSIWS and SSIDATA
1: No delay between SSIWS and SSIDATA
Reserved
The read value is undefined. The write value should
always be 0.
DWL = 010, 011, 100, 101 (with a data word length
of 18, 20, 22 or 24 bits), PDTA = 1 (right-aligned)
The data bits used in SSIRDR or SSITDR are the
following:
Bits (the number of bits in the data word length
specified by DWL minus 1) to 0
i.e. if DWL = 011, then DWL = 20 and bits 19 to 0
are used in either SSIRDR or SSITDR. All other bits
are ignored or reserved.
DWL = 110 (with a data word length of 32 bits), the
PDTA setting is ignored.
All data bits in SSIRDR or SSITDR are used on the
audio serial bus.
Section 18 Serial Sound Interface (SSI)
Page 781 of 1190

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