R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 902

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 19 Controller Area Network (RCAN-ET)
19.9
19.9.1
The standby control register 2 (STBCR2) controls the supply of clocks to RCAN-ET. As an initial
value, the clock to RCAN-ET is halted. Registers should be accessed after the module stop mode
is released.
19.9.2
Two types of resets are supported for RCAN-ET.
• Hardware reset
• Software reset
As the IRR0 bit in the interrupt request register (IRR) is initialized and set to 1 at a reset, it should
be cleared to 0 in the configuration mode shown in the reset sequence diagram.
The area except for the message control field 1 (CONTROL1) of Mailbox is consisted of RAM,
and not initialized at a reset. After a power-on reset, all the Mailboxes should be initialized in the
configuration mode shown in the reset sequence diagram.
19.9.3
The supply of main clocks in the modules is stopped in CAN sleep mode. Therefore, registers
other than MCR, GSR, IRR, and IMR should not be accessed in CAN sleep mode.
19.9.4
When the CAN bus receive frame is being stored in the Mailbox with the CAN communication
functions of RCAN-ET, accessing the Mailbox area generates 0 to 5 peripheral bus cycles as a
wait.
Page 874 of 1190
RCAN-ET is initialized by a power-on reset, deep standby mode, or software standby mode.
The MCR0 bit in the master control register (MCR) initializes registers other than MCR and
CAN communication functions.
Usage Notes
Module Standby Mode
Reset
CAN Sleep Mode
Register Access
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010

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