R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 250

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 9 Bus State Controller (BSC)
Note: Auto-refresh requests are not accepted while multiple read or write accesses are in
Page 222 of 1190
Bit
15 to 12 DREFW
11 to 0
progress, or during a transfer using DMAC, so the auto-refresh interval may become
enlarged in some cases. Set the DRFC bits to an auto-refresh request interval value that
satisfies the auto-refresh interval specification of the SDRAM being used. Furthermore,
make sure to set the auto-refresh request interval to a duration longer than the auto-refresh
cycle.
Bit Name
[3:0]
DRFC
[11:0]
Initial
Value
Undefined R/W
Undefined R/W
R/W
Description
Auto-Refresh Cycle/Self-Refresh Clearing Cycle Count
Setting
These bits specify the number of auto-refresh cycles
and the number of self-refresh clearing cycles. The
DREFW bits can be written to at any time, regardless
of the state of the auto-refresh operation enable
(DRFEN) bit. If auto-refresh is disabled, the value
written to these bits takes effect immediately. If auto-
refresh is enabled, the value written to these bits takes
effect immediately if an auto-refresh cycle is not in
progress. If an auto-refresh cycle is in progress, the
new value takes effect after the cycle completes.
0000: 1 cycle
0001: 2 cycles
0010: 3 cycles
1111: 16 cycles
Auto-Refresh Request Interval Setting
These bits specify the auto-refresh interval. The DRFC
bits can be written to at any time, regardless of the
state of the auto-refresh operation enable (DRFEN) bit.
If auto-refresh is disabled, the value written to these
bits takes effect immediately. If auto-refresh is enabled,
the value written to these bits is reflected in the
operation of the refresh counter from the next auto-
refresh request generated.
000000000000: Setting prohibited
000000000001: 2 cycles
000000000010: 3 cycles
111111111111: 4096 cycles
:
:
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010