R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 710

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 16 Serial Communication Interface with FIFO (SCIF)
Page 682 of 1190
Bit
4
3
2
Bit Name
RE
REIE
Initial
Value
0
0
0
R/W
R/W
R/W
R
Description
Receive Enable
Enables or disables the SCIF serial receiver.
0: Receiver disabled*
1: Receiver enabled*
Notes: 1. Clearing RE to 0 does not affect the receive
Receive Error Interrupt Enable
Enables or disables the receive-error (ERI) interrupts
and break (BRI) interrupts. The setting of REIE bit is
valid only when RIE bit is set to 0.
0: Receive-error interrupt (ERI) and break interrupt
1: Receive-error interrupt (ERI) and break interrupt
Note: * ERI or BRI interrupt requests can be cleared by
Reserved
This bit is always read as 0. The write value should
always be 0.
(BRI) requests are disabled
(BRI) requests are enabled*
2. Serial reception starts when a start bit is
reading the ER, BR or ORER flag after it has
been set to 1, then clearing the flag to 0, or by
clearing RIE and REIE to 0. Even if RIE is set
to 0, when REIE is set to 1, ERI or BRI
interrupt requests are enabled.
flags (DR, ER, BRK, RDF, FER, PER, and
ORER). These flags retain their previous
values.
detected in asynchronous mode, or
synchronous clock input is detected in
clocked synchronous mode. Select the
receive format in SCSMR and SCFCR and
reset the receive FIFO before setting RE to 1.
2
1
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010

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