R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 258

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 9 Bus State Controller (BSC)
[Legend]
x: Don't care
Page 230 of 1190
Bit
11 to 9
8
7 to 3
2 to 0
Bit Name
DPCG[2:0] Undefined R/W
DWR
⎯
DCL[2:0]
Initial
Value
0
All 0
Undefined R/W
R/W
R/W
R
Description
Row Precharge Interval Setting
These bits specify the minimum number of cycles that
must elapse between the SDRAM deactivation
command (PRA) and the next valid command.
000: 1 cycles
111: 8 cycles
Write Recovery Interval Setting
This bit specifies the minimum interval that must elapse
between the SDRAM write command (WRITE) and
deactivation (PRA).
0: 1 cycles
1: 2 cycles
Reserved
These bits are always read as 0. The write value
should always be 0.
SDRAM Controller Column Latency Setting
These bits specify the column latency of the SDRAM
controller. This setting only affects the latency setting
on the SDRAM controller side. To specify the column
latency for externally connected SDRAM it is
necessary to use the separate SDRAMm mode register
(SDmMOD), which is described below.
000: Setting prohibited
001: 1 cycles
010: 2 cycles
011: 3 cycles
1xx: Setting prohibited
:
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010