R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 873
R0K572011S000BE
Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets
1.R0K572011S000BE.pdf
(1222 pages)
2.R0K572011S000BE.pdf
(7 pages)
3.R0K572011S000BE.pdf
(5 pages)
Specifications of R0K572011S000BE
Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 873 of 1222
- Download datasheet (8Mb)
SH7201 Group
19.4.5
The interrupt mask register is a 16 bit register that protects all corresponding interrupts in the
Interrupt Request Register (IRR) from generating an output signal on the IRQ. An interrupt
request is masked if the corresponding bit position is set to '1'. This register can be read or written
at any time. The IMR directly controls the generation of IRQ, but does not prevent the setting of
the corresponding bit in the IRR.
• IMR (Address = H'00A)
Bit 15 to 0: Maskable interrupt sources corresponding to IRR[15:0] respectively. When a bit is
set, the interrupt signal is not generated, although setting the corresponding IRR bit is still
performed.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit[15:0]: IMRn
0
1
Initial value:
R/W:
Bit:
Interrupt Mask Register (IMR)
IMR15 IMR14 IMR13 IMR12 IMR11 IMR10 IMR9
R/W
15
1
R/W
14
1
Description
Corresponding IRR is not masked (IRQ is generated for interrupt conditions)
Corresponding interrupt of IRR is masked (Initial value)
R/W
13
1
R/W
12
1
R/W
11
1
R/W
10
1
R/W
9
1
IMR8
R/W
8
1
IMR7
R/W
7
1
IMR6
R/W
Section 19 Controller Area Network (RCAN-ET)
6
1
IMR5
R/W
5
1
IMR4
R/W
4
1
IMR3
R/W
3
1
IMR2
R/W
2
1
Page 845 of 1190
R/W
IMR1
1
1
R/W
IMR0
0
1
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