EP2AGX95EF29C4N Altera, EP2AGX95EF29C4N Datasheet - Page 108

• Manufacturer Part Number: EP2AGX95EF29C4N
• Description: IC ARRIA II GX FPGA 95K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX95EF29C4N

• Number Of Logic Elements/cells: 89178
• Number Of Labs/clbs: 3747
• Total Ram Bits: 6679
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 93674
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 93674
• Ram Bits: 7025459.2
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

5–4
Figure 5–2. GCLK Networks in Arria II GZ Devices
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Regional Clock Networks
CLK[0..3]
For Arria II devices, the RCLK networks only pertain to the quadrant they drive into.
RCLK networks provide the lowest clock delay and skew for logic contained in a
single device quadrant. Arria II IOEs and internal logic in a given quadrant can also
drive RCLKs to create internally generated RCLKs and other high fan-out control
signals; for example, synchronous or asynchronous clears and clock enables.
Figure 5–3
Arria II devices.
L2
L3
GCLK[0..3]
and
Figure 5–4
C
show CLK pins and PLLs that can drive RCLK networks in
GCLK[12..15]
GCLK[4..7]
LK[1
CLK[4..7]
T1 T2
B1 B2
2..15]
Chapter 5: Clock Networks and PLLs in Arria II Devices
GCLK[8..11]
R2
R3
December 2010 Altera Corporation
Clock Networks in Arria II Devices
CLK[8..11]