EP2AGX95EF29C4N Altera, EP2AGX95EF29C4N Datasheet - Page 312

• Manufacturer Part Number: EP2AGX95EF29C4N
• Description: IC ARRIA II GX FPGA 95K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX95EF29C4N

• Number Of Logic Elements/cells: 89178
• Number Of Labs/clbs: 3747
• Total Ram Bits: 6679
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 93674
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 93674
• Ram Bits: 7025459.2
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

9–32
Figure 9–15. Multi-Device PS Configuration Using a USB-Blaster, EthernetBlaster, EthernetBlaster II, MasterBlaster,
ByteBlaster II, or ByteBlasterMV Cable
Notes to
(1) Connect the pull-up resistor to the same supply voltage, V
(2) You only need the pull-up resistors on DATA0 and DCLK if the download cable is the only configuration scheme used on your board. This ensures
(3) The MSEL pin settings vary for different configuration voltage standards and POR delays. To connect MSEL[3..0]for an Arria II GX device, refer
(4) In the ByteBlasterMV cable, pin 6 is a no connect. In the USB-Blaster and ByteBlaster II cables, this pin is connected to nCE when it is used for
Arria II Device Handbook Volume 1: Device Interfaces and Integration
EthernetBlaster, EthernetBlaster II, MasterBlaster, ByteBlaster II, or ByteBlasterMV cable.
that DATA0 and DCLK are not left floating after configuration. For example, if you are also using a configuration device, you do not need the pull-up
resistors on DATA0 and DCLK.
to
AS programming; otherwise, it is a no connect.
Table 9–6 on page
Figure
9–15:
f
V
CCIO
10
kΩ
/V
(1)
V
10
CCPGM
9–9. To connect MSEL[2..0] for an Arria II GZ device, refer to
CCIO
Figure 9–15
For more information about how to use the USB-Blaster, ByteBlaster II,
ByteBlasterMV, EthernetBlaster, EthernetBlaster II, or MasterBlaster cables, refer to
the following user guides:
■
■
■
■
■
■
kΩ
/V
(1)
CCPGM
ByteBlaster II Download Cable User Guide
ByteBlasterMV Download User Guide
EthernetBlaster Communications Cable User Guide
EthernetBlaster II Communications Cable User Guide
MasterBlaster Serial/USB Communications Cable User Guide
USB-Blaster Download Cable User Guide
(2)
10
V
CCPGM
GND
V
kΩ
CCIO
(3)
(3)
shows how to configure multiple Arria II devices with a download cable.
/
(1)
DATA0
nCONFIG
nCONFIG
nCE
MSEL[n..0]
nCE
MSEL[n..0]
DATA0
Arria II Device 1
Arria II Device 2
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices
CONF_DONE
CONF_DONE
nSTATUS
nSTATUS
CCIO
DCLK
nCEO
nCEO
DCLK
for Arria II GX devices or V
V
10
CCIO
N.C.
kΩ
/V
(1)
10
CCPGM
V
CCIO
kΩ
/V
(1)
CCPGM
Table 9–7 on page
CCPGM
10
V
CCIO
kΩ
for Arria II GZ devices as the USB-Blaster,
/V
(1)
CCPGM
(2)
9–10.
10-Pin Male Header
Pin 1
Download Cable
December 2010 Altera Corporation
(PS Mode)
V
GND
CCIO
/V
(1)
V
CCPGM
GND
IO
(4)
PS Configuration