EP2AGX95EF29C4N Altera, EP2AGX95EF29C4N Datasheet - Page 554

• Manufacturer Part Number: EP2AGX95EF29C4N
• Description: IC ARRIA II GX FPGA 95K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX95EF29C4N

• Number Of Logic Elements/cells: 89178
• Number Of Labs/clbs: 3747
• Total Ram Bits: 6679
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 93674
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 93674
• Ram Bits: 7025459.2
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

2–64
Arria II Device Handbook Volume 2: Transceivers
Figure 2–37
illegal due to crossover (shown in red) of cascade clock paths on the PLL cascade
network.
Figure 2–37. Illegal FPGA Fabric-Transceiver PLL Cascading Configuration
shows that this FPGA fabric-transceiver PLL cascading configuration is
Channel 3
Channel 2
Channel 3
Channel 2
Channel 3
Channel 2
Channel 3
Channel 2
Channel 1
Channel 0
Channel 1
Channel 0
Channel 1
Channel 0
Channel 1
Channel 0
Transceiver Block GXBL3
Transceiver Block GXBL2
Transceiver Block GXBL1
Transceiver Block GXBL0
CMU 1
CMU 0
CMU 1
CMU 0
CMU 1
CMU 0
CMU 1
CMU 0
PLL
PLL
PLL
PLL
PLL
PLL
PLL
PLL
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
Cascade
Network
PLL
Chapter 2: Transceiver Clocking in Arria II Devices
FPGA Fabric PLL-Transceiver PLL Cascading
PLL_1
PLL_4
EP2AGX190FF35
December 2010 Altera Corporation