EP2AGX95EF29C4N Altera, EP2AGX95EF29C4N Datasheet - Page 178
EP2AGX95EF29C4N
Manufacturer Part Number
EP2AGX95EF29C4N
Description
IC ARRIA II GX FPGA 95K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX95EF29C4N.pdf
(306 pages)
Specifications of EP2AGX95EF29C4N
Number Of Logic Elements/cells
89178
Number Of Labs/clbs
3747
Total Ram Bits
6679
Number Of I /o
372
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
93674
# I/os (max)
372
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
93674
Ram Bits
7025459.2
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2AGX95EF29C4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- EP2AGX45CU17C6N PDF datasheet
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- EP2AGX95EF29C4N PDF datasheet #6
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6–20
Arria II Device Handbook Volume 1: Device Interfaces and Integration
The R
typical R
Figure 6–5. R
To use OCT for:
■
■
R
Arria II devices support R
circuit compares the total impedance of the I/O buffer to the external
25-Ω ±1% or 50-Ω ±1% resistors connected to the RUP and RDN pins, and dynamically
enables or disables the transistors until they match.
The R
occurs at the end of device configuration. When the calibration circuit finds the
correct impedance, it powers down and stops changing the characteristics of the
drivers.
Figure 6–6. R
S
OCT with Calibration for Arria II Devices
SSTL Class I standard—select the 50-Ω on-chip series termination setting, thus
eliminating the external 25-Ω R
SSTL Class II standard—select the 25-Ω on-chip series termination setting (to
match the 50-Ω transmission line and the near-end external 50-Ω pull-up to V
S
S
shown in
shown in
S
values are 25 Ω and 50 Ω.
S
S
OCT without Calibration for Arria II Devices
OCT with Calibration for Arria II Devices
Figure 6–5
Series Termination
Figure 6–6
Series Termination
Arria II GX Driver
Arria II Driver
S
V
V
GND
GND
OCT with calibration in all banks. The R
CCIO
CCIO
is the intrinsic impedance of output transistors. The
is the intrinsic impedance of transistors. Calibration
R
R
R
R
S
S
S
S
S
(to match the 50-Ω transmission line).
Z
Z
O
O
= 50
= 50
Chapter 6: I/O Features in Arria II Devices
Receiving
Receiving
Device
Device
December 2010 Altera Corporation
S
OCT calibration
OCT Support
TT
).
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