E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 1023
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E62655RUSB
Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet
1.E62655RUSB.pdf
(1093 pages)
Specifications of E62655RUSB
Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 1023 of 1093
- Download datasheet (6Mb)
TCR0—Timer Control Register 0
Bit
Initial value
Read/Write
:
:
:
CCLR2
R/W
7
0
Notes: 1. Synchronous operation setting is performed by setting the
Counter Clear
0
1
CCLR1
R/W
0
1
0
1
6
0
2. When TGRC or TGRD is used as a buffer register, TCNT is
0
1
0
1
0
1
0
1
SYNC bit in TSYR to 1.
not cleared because the buffer register setting has priority,
and compare match/input capture does not occur.
TCNT clearing disabled
TCNT cleared by TGRA compare match/input capture
TCNT cleared by TGRB compare match/input capture
TCNT cleared by counter clearing for another channel
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation *
TCNT clearing disabled
TCNT cleared by TGRC compare match/input capture *
TCNT cleared by TGRD compare match/input capture *
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation *
CCLR0
R/W
5
0
CKEG1
Clock Edge
R/W
0
1
4
0
—
0
1
CKEG0
R/W
Count at rising edge
Count at falling edge
Count at both edges
3
0
Time Prescaler
0
1
H'FFD0
Rev. 5.00 Sep 14, 2006 page 993 of 1060
0
1
0
1
TPSC2
R/W
2
0
0
1
0
1
0
1
0
1
Internal clock: counts on /1
Internal clock: counts on /4
Internal clock: counts on /16
Internal clock: counts on /64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
External clock: counts on TCLKC pin input
External clock: counts on TCLKD pin input
Appendix B Internal I/O Register
TPSC1
R/W
1
0
1
2
2
1
TPSC0
R/W
0
0
REJ09B0331-0500
TPU0
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