E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 653

• Manufacturer Part Number: E62655RUSB
• Description: EMULATOR BASE H8S/2655R W/USB
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of E62655RUSB

• Contents: E6000 Emulator Unit and 4 Logic Probes
• For Use With/related Products: H8S/2655R
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

In serial reception, the SCI operates as described below.
[1] The SCI monitors the transmission line, and if a 0 stop bit is detected, performs internal
[2] The received data is stored in RSR in LSB-to-MSB order.
[3] The parity bit and stop bit are received.
Note: * Subsequent receive operations cannot be performed when a receive error has occurred.
[4] If the RIE bit in SCR is set to 1 when the RDRF flag changes to 1, a receive data full interrupt
synchronization and starts reception.
After receiving these bits, the SCI carries out the following checks.
[a] Parity check:
[b] Stop bit check:
[c] Status check:
(RXI) request is generated.
Also, if the RIE bit in SCR is set to 1 when the ORER, PER, or FER flag changes to 1, a
receive error interrupt (ERI) request is generated.
The SCI checks whether the number of 1 bits in the receive data agrees with the parity
(even or odd) set in the O/E bit in SMR.
The SCI checks whether the stop bit is 1.
If there are two stop bits, only the first is checked.
The SCI checks whether the RDRF flag is 0, indicating that the receive data can be
transferred from RSR to RDR.
If all the above checks are passed, the RDRF flag is set to 1, and the receive data is stored
in RDR.
If a receive error * is detected in the error check, the operation is as shown in table 14.11.
Also note that the RDRF flag is not set to 1 in reception, and so the error flags must be
cleared to 0.
Section 14 Serial Communication Interface (SCI)
Rev. 5.00 Sep 14, 2006 page 623 of 1060
REJ09B0331-0500