E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 729

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E62655RUSB

Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet

Specifications of E62655RUSB

Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
16.4.7
The A/D converter’s conversion start mode is set by means of the PWR bit in ADCSR. When the
PWR bit is cleared to 0, low-power conversion mode is set, and the internal analog circuitry is
made inactive. When the PWR bit is set to 1, high-speed start mode is set, and the analog circuitry
is made active.
In low-power conversion mode, the analog circuit power is turned on simultaneously with the start
of conversion (ADST setting), and after 200 cycles of the reference clock the analog circuitry
changes to the ready state, and the first A/D conversion operation is started. The reference clock is
selected by the CKS bit in ADCSR. When conversion is carried out continuously, the second and
subsequent A/D conversion operations are performed every 10 cycles. When A/D conversion
ends, ADST is cleared to 0 and the analog circuit power is cut automatically. Since the analog
circuitry is only active during A/D conversion in this mode, current dissipation can be reduced.
In high-speed start mode, even when A/D conversion ends and ADST is cleared to 0, power
continues to be supplied to the analog circuitry and conversion can still be carried out. Conversion
is started as soon as ADST is set to 1 again. Only in the case of the first conversion after the
analog power supply is turned on, conversion does not begin until 200 cycles after ADST is set.
ADF
ADST
Channel 0
Channel 1
Channel 2
Channel 3
ADDRA
ADDRB
ADDRC
ADDRD
Figure 16.8 Example of Simultaneous Sampling Operation (Group Single Mode)
Conversion Start Modes
Conversion
standby
Conversion standby
Conversion standby
Conversion
standby
Set to 1 by software
Sampling 1
Sampling 2
A/D
conversion 1
Conversion
standby
Conversion standby
Conversion result 1
A/D conversion 2
Rev. 5.00 Sep 14, 2006 page 699 of 1060
Cleared automatically
Conversion result 2
Section 16 A/D Converter
REJ09B0331-0500

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