E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 47

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E62655RUSB

Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet

Specifications of E62655RUSB

Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Type
Bus control
DMA controller
(DMAC)
Symbol
LWR
CAS/
OE
LCAS
WAIT
DREQ
DREQ
TEND
TEND
DACK
DACK
1
0
1
0
1
0
,
,
,
TFP-120
85
116
86
86
62, 60
63, 61
111, 112
Pin No.
FP-128
93
126
94
94
70, 66
71, 69
121, 122
I/O
Output Low write/lower column address
Output Upper column address strobe/
Output Lower column address strobe:
Input
Input
Output DMA transfer end 1 and 0: These
Output DMA transfer acknowledge 1 and 0:
Rev. 5.00 Sep 14, 2006 page 17 of 1060
Name and Function
strobe/lower write enable:
A strobe signal that writes to external
space and indicates that the lower
half (D
enabled.
The 2CAS type (LCASS = 1) DRAM
lower column address strobe signal.
The 2WE type DRAM lower write
enable signal.
column address strobe/output
enable/refresh:
The 2CAS type DRAM upper column
address strobe signal.
The 2WE type DRAM column
address strobe signal.
The PSRAM output enable signal.
The 2-CAS type (LCASS = 0) DRAM
lower column address strobe signal
Wait: Requests insertion of a wait
state in the bus cycle when
accessing external 3-state address
space.
DMA request 1 and 0: These pins
request DMAC activation.
pins indicate the end of DMAC data
transfer.
These are the DMAC single address
transfer acknowledge pins.
7
to D
0
) of the data bus is
Section 1 Overview
REJ09B0331-0500

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