E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 1030

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E62655RUSB

Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet

Specifications of E62655RUSB

Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Appendix B Internal I/O Register
TCR1—Timer Control Register 1
Rev. 5.00 Sep 14, 2006 page 1000 of 1060
REJ09B0331-0500
Bit
Initial value
Read/Write
:
:
:
7
0
Note: * Synchronous operating setting is performed by setting
Counter Clear
0
1
CCLR1
R/W
0
1
0
1
6
0
the SYNC bit in TSYR to 1.
TCNT clearing disabled
TCNT cleared by TGRA compare match/input capture
TCNT cleared by TGRB compare match/input capture
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation*
CCLR0
R/W
5
0
CKEG1
Legend: *: Don’t care
Note: This setting is ignored when channel 1
Clock Edge
R/W
4
0
0
1
is in phase counting mode.
0
1
*
CKEG0
R/W
Count at rising edge
Count at falling edge
Count at both edges
3
0
Note: This setting is ignored when channel 1 is in phase
Time Prescaler
H'FFE0
0
1
0
1
0
1
TPSC2
counting mode.
R/W
2
0
0
1
0
1
0
1
0
1
Internal clock: counts on /1
Internal clock: counts on /4
Internal clock: counts on /16
Internal clock: counts on /64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
Internal clock: counts on /256
Counts on TCNT2 overflow/underflow
TPSC1
R/W
1
0
TPSC0
R/W
0
0
TPU1

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