E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 717

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E62655RUSB

Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet

Specifications of E62655RUSB

Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Bit 2—Simultaneous Sampling (DSMP): Enables or disables simultaneous sampling of two
channels. For details of simultaneous sampling, see section 16.4.6, Simultaneous Sampling
Operation.
Only set the DSMP bit while conversion is stopped.
Bits 1 and 0—Buffer Enable 1 and 0 (BUFE1, BUFE0): These bits specify whether or not
registers ADDRB to ADDRD are to be used as buffer registers.
For setting and clearing of the ADF flag in the case of buffer operation, see section 16.4.5, Buffer
Operation.
Only set the BUFE1 and BUFE0 bits while conversion is stopped.
Bit 2
DSMP
0
1
Bit 1
BUFE1
0
1
Description
Normal sampling operation
Simultaneous sampling operation
Bit 0
BUFE0
0
1
0
1
Description
Normal operation
ADDRA and ADDRB are used for buffer operation (conversion
result
(ADDRB is the buffer register)
ADDRA and ADDRC, and ADDRB and ADDRD, are used for buffer
operation (conversion result 1
result 2
(ADDRC and ADDRD are the buffer registers)
ADDRA to ADDRD are used for buffer operation
(conversion result
(ADDRB to ADDRD are the buffer registers)
ADDRA
ADDRB
ADDRB)
ADDRA
ADDRD)
Rev. 5.00 Sep 14, 2006 page 687 of 1060
ADDRB
ADDRA
ADDRC
ADDRC; conversion
Section 16 A/D Converter
REJ09B0331-0500
ADDRD)
(Initial value)
(Initial value)

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