E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 914

• Manufacturer Part Number: E62655RUSB
• Description: EMULATOR BASE H8S/2655R W/USB
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of E62655RUSB

• Contents: E6000 Emulator Unit and 4 Logic Probes
• For Use With/related Products: H8S/2655R
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Appendix B Internal I/O Register
TIOR3L—Timer I/O Control Register 3L
Rev. 5.00 Sep 14, 2006 page 884 of 1060
REJ09B0331-0500
Bit
Initial value
Read/Write
Note: When GRC or GRD is designated for buffer operation, this setting is invalid and the register
operates as a buffer register.
:
:
:
Legend: *: Don’t care
Notes:
TGR3D I/O Control
0
1
IOD3
R/W
7
0
0
1
0
1
1.
2.
0
1
0
1
0
1
*
When bits TPSC2 to TPSC0 in TCR4 are set to B'000 and /1 is used as
the TCNT4 count clock, this setting is invalid and input capture is not
generated.
When the BFB bit in TMDR3 is set to 1 and TGR3D is used as a buffer
register, this setting is invalid and input capture/output compare is not
generated.
IOD2
R/W
0
1
0
1
0
1
0
1
0
1
*
*
6
0
TGR3D
is output
compare
register
TGR3D
is input
capture
register *
IOD1
R/W
5
0
2
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCD3 pin
Capture input
source is channel
4/count clock
Legend: *: Don’t care
Note: When the BFA bit in TMDR3 is set to 1 and TGR3C is used as a buffer
TRG3C I/O Control
IOD0
R/W
0
1
4
0
0
1
0
1
register, this setting is invalid and input capture/output compare is not
generated.
IOC3
R/W
0
1
0
1
0
1
*
3
0
1 output at compare match
Toggle output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
0 output at compare match
0 output at compare match
Input capture at TCNT4 count-up/
count-down *
0
1
0
1
0
1
0
1
0
1
*
*
TGR3C
is output
compare
register
TGR3C
is input
capture
register
IOC2
R/W
2
0
H'FE83
1
Output disabled
Initial output is
0 output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCC3 pin
Capture input
source is channel
4/count clock
IOC1
R/W
1
0
IOC0
R/W
0
0
1 output at compare match
Toggle output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
0 output at compare match
0 output at compare match
Input capture at TCNT4 count-up/
count-down
TPU3