E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 92
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E62655RUSB
Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet
1.E62655RUSB.pdf
(1093 pages)
Specifications of E62655RUSB
Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 92 of 1093
- Download datasheet (6Mb)
Section 2 CPU
2.8.2
When the RES input goes low all current processing stops and the CPU enters the reset state. All
interrupts are masked in the reset state. Reset exception handling starts when the RES signal
changes from low to high.
The reset state can also be entered by a watchdog timer overflow. For details, refer to section 13,
Watchdog Timer.
Rev. 5.00 Sep 14, 2006 page 62 of 1060
REJ09B0331-0500
Notes: 1.
RES = high
Exception-handling state
Reset State
2.
Bus-released state
From any state except hardware standby mode, a transition to the reset state occurs whenever RES
goes low. A transition can also be made to the reset state when the watchdog timer overflows.
From any state, a transition to hardware standby mode occurs when STBY goes low.
Reset state *
End of bus
request
End of
exception
handling
1
Figure 2.15 State Transitions
Bus
request
STBY = high, RES = low
External interrupt
Request for
exception
handling
Program execution
End of bus request
Bus request
state
Interrupt
request
SLEEP
instruction
with
SSBY = 1
Hardware standby mode *
SLEEP
instruction
with
SSBY = 0
Software standby mode
Power-down state
Sleep mode
2
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