E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 175
E62655RUSB
Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet
1.E62655RUSB.pdf
(1093 pages)
Specifications of E62655RUSB
Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Bit 2—Area Partition Unit Select (ASS): Selects the area partition unit.
Bit 1—Write Data Buffer Enable (WDBE): Selects whether or not the write buffer function is
used for an external write cycle or DMAC single address cycle.
Bit 0—WAIT Pin Enable (WAITE): Selects enabling or disabling of wait input by the WAIT
pin.
6.2.6
MCR is an 8-bit readable/writable register that selects the DRAM strobe control method, number
of precharge cycles, access mode, address multiplexing shift size, and the number of wait states
inserted during refreshing, when areas 2 to 5 are designated as DRAM interface. When areas 2 to
5 are designated as PSRAM interface, MCR selects the number of precharge cycles and the access
mode for PSRAM.
Bit 2
ASS
0
1
Bit 1
WDBE
0
1
Bit 0
WAITE
0
1
Bit
Initial value
R/W
Memory Control Register (MCR)
Description
Area partition unit is 128 kbytes (1 Mbit)
Area partition unit is 2 Mbytes (16 Mbits)
Description
Write data buffer function not used
Write data buffer function used
Description
Wait input by WAIT pin disabled. WAIT pin can be used as I/O port.
Wait input by WAIT pin enabled
:
:
:
TPC
R/W
7
0
R/W
BE
6
0
RCDM
R/W
5
0
CW2
R/W
4
0
Rev. 5.00 Sep 14, 2006 page 145 of 1060
MXC1
R/W
3
0
MXC0
R/W
2
0
Section 6 Bus Controller
RLW1
R/W
REJ09B0331-0500
1
0
(Initial value)
(Initial value)
(Initial value)
RLW0
R/W
0
0
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