E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 352
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E62655RUSB
Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet
1.E62655RUSB.pdf
(1093 pages)
Specifications of E62655RUSB
Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 352 of 1093
- Download datasheet (6Mb)
Section 8 Data Transfer Controller
Table 8.3
Activation Source
Software activation
Interrupt activation
Figure 8.3 shows a block diagram of activation source control. For details see section 5, Interrupt
Controller.
When an interrupt has been designated a DTC activation source, existing CPU mask level and
interrupt controller priorities have no effect. If there is more than one activation source at the same
time, the DTC operates in accordance with the default priorities.
Rev. 5.00 Sep 14, 2006 page 322 of 1060
REJ09B0331-0500
Source flag cleared
IRQ interrupt
supporting
DTVECR
Activation Source and DTCER Clearance
On-chip
module
Figure 8.3 Block Diagram of DTC Activation Source Control
When the DISEL Bit Is 0 and
the Specified Number of
Transfers Have Not Ended
The SWDTE bit is cleared to 0
The corresponding DTCER bit
remains set to 1
The activation source flag is
cleared to 0
Interrupt
request
DTCER
Select
Clear
Interrupt controller
controller
When the DISEL Bit Is 1, or when
the Specified Number of Transfers Have
Ended
The SWDTE bit remains set to 1
An interrupt is issued to the CPU
The corresponding DTCER bit is cleared to
0
The activation source flag remains set to 1
A request is issued to the CPU for the
activation source interrupt
Clear
DTC
Clear request
Interrupt mask
CPU
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