E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 242
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E62655RUSB
Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet
1.E62655RUSB.pdf
(1093 pages)
Specifications of E62655RUSB
Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 242 of 1093
- Download datasheet (6Mb)
Section 6 Bus Controller
6.11.4
Figure 6.47 shows the timing for transition to the bus-released state.
Rev. 5.00 Sep 14, 2006 page 212 of 1060
REJ09B0331-05000
Address bus
HWR, LWR
BREQO *
[1]
[2]
[3]
[4]
[5]
[6]
Note: * Output only when BREQOE is set to 1.
Data bus
BREQ
BACK
Low level of BREQ pin is sampled at rise of T
BACK pin is driven low at end of CPU read cycle, releasing bus to external bus master.
BREQ pin state is still sampled in external bus released state.
High level of BREQ pin is sampled.
BACK pin is driven high, ending bus release cycle.
BREQO signal goes high 1.5 clocks after BACK signal goes high.
RD
AS
Transition Timing
T
0
Figure 6.47 Bus-Released State Transition Timing
CPU cycle
T
Address
1
[1]
Minimum
1 state
T
2
[2]
2
state.
External bus released state
[3]
High impedance
High impedance
High impedance
High impedance
High impedance
[4]
[5]
cycle
CPU
[6]
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