E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 140
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E62655RUSB
Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet
1.E62655RUSB.pdf
(1093 pages)
Specifications of E62655RUSB
Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 140 of 1093
- Download datasheet (6Mb)
Section 5 Interrupt Controller
(1) Interrupt Acceptance Control and 3-Level Control
In interrupt control modes 0, 1, and 3, interrupt acceptance control and 3-level mask control is
performed by means of the I and UI bits in CCR, and ICR (control level).
Table 5.7 shows the interrupts selected in each interrupt control mode.
Table 5.7
Interrupt Control Mode
0
1
2
3
Legend:
*: Don’t care
(2) 8-Level Control
In interrupt control modes 2 and 3, 8-level mask level determination is performed according to the
interrupt priority level (IPR) for interrupts selected in interrupt acceptance control and 3-level
control.
The interrupt source selected is the interrupt with the highest priority level, and whose priority
level set in IPR is higher than the mask level.
Table 5.8
Interrupt Control Mode
0
1
2
3
Rev. 5.00 Sep 14, 2006 page 110 of 1060
REJ09B0331-0500
Interrupts Selected in Each Interrupt Control Mode (1)
Interrupts Selected in Each Interrupt Control Mode (2)
Selected Interrupts
All interrupts
Highest-priority-level (IPR) interrupt whose priority level is greater
than the mask level (IPR > I2 to I0).
I
0
1
0
1
*
0
1
Interrupt Mask Bits
UI
*
*
*
0
1
*
*
0
1
Selected Interrupts
All interrupts (control level 1 has priority)
NMI interrupts
All interrupts (control level 1 has priority)
NMI and control level 1 interrupts
NMI interrupts
All interrupts
All interrupts
NMI and control level 1 interrupts
NMI interrupts
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