E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 117
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E62655RUSB
Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet
1.E62655RUSB.pdf
(1093 pages)
Specifications of E62655RUSB
Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 117 of 1093
- Download datasheet (6Mb)
4.3
Traces are enabled in interrupt control modes 2 and 3. Trace mode is not activated in interrupt
control modes 0 and 1, irrespective of the state of the T bit. For details of interrupt control modes,
see section 5, Interrupt Controller.
If the T bit in EXR is set to 1, trace mode is activated. In trace mode, a trace exception occurs on
completion of each instruction.
Trace mode is canceled by clearing the T bit in EXR to 0. It is not affected by interrupt masking.
Table 4.4 shows the state of CCR and EXR after execution of trace exception handling.
Interrupts are accepted even within the trace exception handling routine.
The T bit saved on the stack retains its value of 1, and when control is returned from the trace
exception handling routine by the RTE instruction, trace mode resumes.
Trace exception handling is not carried out after execution of the RTE instruction.
Table 4.4
Legend:
1: Set to 1
0: Cleared to 0
—: Retains value prior to execution.
Interrupt Control Mode
Traces
Status of CCR and EXR after Trace Exception Handling
0
1
2
3
1
1
I
Trace exception handling cannot be used.
CCR
UI
—
1
Rev. 5.00 Sep 14, 2006 page 87 of 1060
Section 4 Exception Handling
I2 to I0
—
—
EXR
REJ09B0331-0500
T
0
0
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