E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 272

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E62655RUSB

Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet

Specifications of E62655RUSB

Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 7 DMA Controller
Bit 5—Destination Address Increment/Decrement Enable (DAIDE): These bits specify
whether destination address register MARB is to be incremented, decremented, or left unchanged,
when data transfer is performed.
Bit 6
DAID
0
1
Bit 4—Reserved: Can be read or written to.
Bits 3 to 0—Data Transfer Factor (DTF3 to DTF0): These bits select the data transfer factor
(activation source). The factors that can be specified differ between normal mode and block
transfer mode.
Bit 3
DTF3
0
1
Legend: *: Don’t care
Rev. 5.00 Sep 14, 2006 page 242 of 1060
REJ09B0331-0500
Normal Mode
Bit 2
DTF2
0
1
*
Bit 5
DAIDE
0
1
0
1
Bit 1
DTF1
0
1
0
1
*
Description
MARB is fixed
MARB is incremented after a data transfer
MARB is fixed
MARB is decremented after a data transfer
When DTSZ = 0, MARB is incremented by 1 after a transfer
When DTSZ = 1, MARB is incremented by 2 after a transfer
When DTSZ = 0, MARB is decremented by 1 after a transfer
When DTSZ = 1, MARB is decremented by 2 after a transfer
Bit 0
DTF0
0
1
0
1
*
0
1
*
Description
Activated by DREQ pin falling edge input
Activated by DREQ pin low-level input
Auto-request (cycle steal)
Auto-request (burst)
(Initial value)
(Initial value)

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