AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 119
AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
Lead Free Status / RoHS Status
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23543A/0—September 2000
5.6
Pin Attribute
Summary
Sampled
Chapter 5
AHOLD (Address Hold)
Input
AHOLD can be asserted by the system to initiate one or more
inquire cycles. To allow the system to drive the address bus
during an inquire cycle, the processor floats A[31:3] and AP off
the clock edge on which AHOLD is sampled asserted. The data
bus and all other control and status signals remain under the
control of the processor and are not floated. This allows a bus
cycle that is in progress when AHOLD is sampled asserted to
continue to completion. The processor resumes driving the
address bus off the clock edge on which AHOLD is sampled
negated.
If AHOLD is sampled asserted, ADS# is only asserted in order
to perform a writeback cycle due to an inquire cycle that hits a
modified cache line.
The processor samples AHOLD on every clock edge. AHOLD is
recognized while INIT and RESET are sampled asserted.
Signal Descriptions
AMD-K6™-IIIE+ Embedded Processor Data Sheet
97
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