AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 153

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

23543A/0—September 2000
5.44
Pin Attribute
Summary
Driven
Chapter 5
SMIACT# (System Management Interrupt Active)
Output
The processor acknowledges the assertion of SMI# with the
assertion of SMIACT# to indicate that the processor has
entered System Management Mode (SMM). The system logic
can use SMIACT# to enable SMM memory. See “SMI# (System
Management Interrupt)” on page 130 for more details.
See “System Management Mode (SMM)” on page 241 for more
details regarding SMM.
The processor asserts SMIACT# after the last BRDY# of the last
pending bus cycle is sampled asserted (including all pending
write cycles) and after EWBE# is sampled asserted (if EWBE#
is masked off, then SMIACT# is not affected by EWBE#).
SMIACT# remains asserted until after the last BRDY# of the
last pending bus cycle associated with exiting SMM is sampled
asserted.
SMIACT# remains asserted during any flush, internal snoop, or
writeback cycle due to an inquire cycle.
Signal Descriptions
AMD-K6™-IIIE+ Embedded Processor Data Sheet
131