AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 317

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AMD-K6-IIIE+550ACR

Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AMD-K6-IIIE+550ACR

Lead Free Status / RoHS Status
Not Compliant
23543A/0—September 2000
Pin Connection
Requirements
Chapter 15
For proper operation, the following requirements for signal pin
connections must be met:
Do not drive address and data signals into large capacitive
loads at high frequencies. If necessary, use buffer chips to
drive large capacitive loads.
Leave all NC (no-connect) pins unconnected.
Unused
appropriate signal level.
Reserved signals can be treated in one of the following ways:
Keep trace lengths to a minimum.
Active Low inputs that are not being used should be
connected to V
Active High inputs that are not being used should be
connected to GND through a pulldown resistor.
As no-connect (NC) pins, in which case these pins are left
unconnected
As pins connected to the system logic as defined by the
industry-standard Super7 and Socket 7 interface
Any combination of NC and Socket 7 pins
inputs
Electrical Data
CC3
should
AMD-K6™-IIIE+ Embedded Processor Data Sheet
through a 20-kW pullup resistor.
always
be
connected
to an
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