AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 290

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

AMD-K6™-IIIE+ Embedded Processor Data Sheet
Figure 95. L2 Tag Information for the AMD-K6™-IIIE+ Processor—EAX
13.6
268
Symbol
31
Tag
Line1ST Line 1 state (M=11, E=10, S=01, I=00) 11-10
Line0ST Line 0 state (M=11, E=10, S=01, I=00) 9-8
LRU
Description
Tag data read or written
Two bits of LRU for each way
Reserved
Debug
Tag
LRU (Least Recently Used). For the 4-way set associative L2 cache,
each way has a 2-bit LRU field for each sector. Values for the
LRU field are 00b, 01b, 10b, and 11b, where 00b indicates that
the sector is “most recently used,” and 11b indicates that the
sector is “least recently used” (see Figure 96 on page 268).
EAX[7:6] indicate LRU information for Way 0, EAX[5:4] for
Way 1, EAX[3:2] for Way 2, and EAX[1:0] for Way 3.
Figure 96. LRU Byte
The AMD-K6-IIIE+ processor implements the standard x86
debug functions, registers, and exceptions. In addition, the
processor supports the I/O breakpoint debug extension. The
7
LRU Values
00b Most Recently Used
01b Used More Recent Than 10b, But Less Recent Than 00b
10b Used More Recent Than 11b, But Less Recent Than 01b
11b Least Recently Used
Way 0
Preliminary Information
Bit
7-0
31-15
6
Test and Debug
5
Way 1
15
14
4
3
Way 2
12
Line1ST
11
2
10 9
Line0ST
1
Way 3
8
7
0
23543A/0—September 2000
LRU
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