AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 213

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

23543A/0—September 2000
Figure 77. Basic Special Bus Cycle (Halt Cycle)
Chapter 7
BE[7:0]#
A[31:3]
BRDY#
M/IO#
ADS#
W/R#
D/C#
CLK
A[4:3] = 00b
FBh
Table 33). A halt special cycle is generated after the processor
executes the HLT instruction.
If the processor samples FLUSH# asserted, it writes back any
L1 data cache and L2 cache lines that are in the modified state
and invalidates all lines in all caches. The processor then drives
a flush acknowledge special cycle.
If the processor executes a WBINVD instruction, it drives a
writeback special cycle after the processor completes
invalidating and writing back the cache lines.
Bus Cycles
Halt Cycle
AMD-K6™-IIIE+ Embedded Processor Data Sheet
191