AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 20

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

AMD-K6™-IIIE+ Embedded Processor Data Sheet
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Chapter 8, “Power-on Configuration and Initialization” on
p a g e 1 9 9 , d e s c r i b e s h ow t h e s y s t e m l og i c re s e t s t h e
AMD-K6-IIIE+ processor using the RESET signal.
Chapter 9, “Cache Organization” on page 205, describes the
basic architecture and resources of the AMD-K6-IIIE+
processor’s internal caches.
Chapter 10, “Write Merge Buffer” on page 229, describes the 8-
byte write merge buffer and how merging multiple write cycles
into a single write cycle ultimately increases overall system
performance.
Chapter 11, “Floating-Point and Multimedia Execution Units”
on page 237, describes the AMD-K6-IIIE+ processor’s IEEE 754-
compatible and 854-compatible floating point execution unit,
the multimedia and 3DNow!™ technology execution units, and
the floating-point and MMX™/3DNow! technology instruction
compatibility.
Chapter 12, “System Management Mode (SMM)” on page 241,
describes SMM, the state-save area, entry into and exit from
SMM, exceptions and interrupts in SMM, memory allocation
and addressing in SMM, and the SMI# and SMIACT# signals.
Chapter 13, “Test and Debug” on page 251, describes the
various test and debug modes that enable the functional and
manufacturing testing of systems and boards that use the
AMD-K6-IIIE+ processor and that allow designers to debug the
instruction execution of software components.
Chapter 14, “Clock Control” on page 277, describes the five
modes of clock control supported by the AMD-K6-IIIE+
processor.
Chapter 15, “Electrical Data” on page 287, includes operating
ranges, absolute ratings, DC characteristics, power dissipation
data, power and grounding information, and decoupling
recommendations.
Chapter 16, “Signal Switching Characteristics” on page 297,
provides tables listing valid delay, float, setup, and hold timing
specifications for the AMD-K6-IIIE+ processor signals.
Preliminary Information
23543A/0—September 2000
About this Data Sheet