AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 84
AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
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AMD-K6™-IIIE+ Embedded Processor Data Sheet
Figure 53. Gate Descriptor
3.6
Table 11. Summary of Exceptions and Interrupts
62
Interrupt
31 30 29 28 27 26 25 24 23 22
Number
0–255
Reserved
10
11
12
13
14
16
17
0
1
2
3
4
5
6
7
8
9
Interrupt Type
Divide by Zero Error
Debug
Non-Maskable Interrupt
Breakpoint
Overflow
Bounds Check
Invalid Opcode
Device Not Available
Double Fault
Reserved - Interrupt 13
Invalid TSS
Segment Not Present
Stack Segment
General Protection
Page Fault
Floating-Point Error
Alignment Check
Software Interrupt
Exceptions and Interrupts
Segment Selector
Offset 31–16
Table 11 summarizes the exceptions and interrupts.
21
20
Cause
DIV, IDIV
Debug trap or fault
NMI signal sampled asserted
Int 3
INTO
BOUND
Invalid instruction
ESC and WAIT
Fault occurs while handling a fault
—
Task switch to an invalid segment
Instruction loads a segment and present bit is 0 (invalid segment)
Stack operation causes limit violation or present bit is 0
Segment related or miscellaneous invalid actions
Page protection violation or a reference to missing page
Arithmetic error generated by floating-point instruction
Data reference to an unaligned operand. (The AC flag and the AM bit of CR0 are set to 1.)
INT n
19
18
Preliminary Information
17
Software Environment
16
15
P
14
DPL
13
12
0
11
10
Type
Offset 15–0
9
8
7
Symbol
P
DPL
DT
Type
6
5
Present/Valid Bit
Descriptor Privilege Level
Descriptor Type
See Table 10 on page 61
4
Description
3
23543A/0—September 2000
2
1
0
Chapter 3
12
Bits
15
14-13
11-8
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